Deep p-Ring Trench Termination: An Innovative and Cost-Effective Way to Reduce Silicon Area

A new type of high voltage termination, namely the “deep p-ring trench” termination design for high voltage, high power devices is presented and extensively simulated. Termination of such devices consumes a large proportion of the chip size; the proposed design concept not only reduces the termination silicon area required, it also removes the need for an additional mask as is the case of the traditional p+ ring type termination. Furthermore, the presence of the p-ring under and around the bottom of the trench structure reduces the electric field peaks at the corners of the oxide which results in reduced hot carrier injection and improved device reliabilit

On the Investigation of the "anode Side" SuperJunction IGBT Design Concept

In this letter, we present the "anode-side" SuperJunction trench field stop+ IGBT concept with drift region SuperJunction pillars placed at the anode side of the structure rather than the cathode side. The extent of the pillars toward the cathode side is shown to pose a tradeoff between fabrication technology capabilities (and cost) versus the device performance, by extensive TCAD simulations. The proposed device structure simplifies the fabrication requirements by steering clear from the need to align the cathode side features with the SuperJunction pillars. It also provides an extra degree of freedom by decoupling the cathode design from the SuperJunction structure. Additionally, the presence of SuperJunction technology in the drift region of the "anode-side" SJ Trench FS+ IGBT results in 20% reduction of ON-state losses for the same switching energy losses or, up to 30% switching losses reduction for the same ON-state voltage drop, compared with a 1.2-kV breakdown rated conventional FS+ Trench IGBT device. The proposed structure also finds applications in reverse conducting IGBTs, where a reduced snapback can be achieved, and in MOS-controlled thyristor devices

Optimal gate commutated thyristor design for bi-mode gate commutated thyristors underpinning high, temperature independent, current controllability

The Bi-mode Gate Commutated Thyristor (BGCT) is an advanced reverse conducting device aiming high power applications. Due to the high degree of interdigitation of diode parts and Gate Commutated Thyristor (GCT) parts, it is necessary to investigate how to best separate the two and at the same time, how to maximise the individual power handling capability. This work underpins the latter, for the GCT part. In achieving that, this letter details the optimisation direction, identifies the design parameters that influence the Maximum Controllable Current (MCC) and thereafter introduces a new design attribute, the “p-zone”. This new design not only improves the MCC at high temperature, but also at low temperature, yielding temperature independent current handling capability and at least 1000 A, or 23.5 % of improvement compared to the state-of-the-art. As a result, the proposed design constitutes an enabler for optimally designed bi-mode devices rated at least 5000 A for applications with the highest power requirement